Normalize line endings

10 files changed, 1559 insertions, 1559 deletions

diff --git a/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.c b/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.c
index 31319ef57..2809c9d18 100644
--- a/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.c
+++ b/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.c
@@ -1,49 +1,49 @@
-/*

-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-#include "hal.h"

-

-/**

- * @brief   PAL setup.

- * @details Digital I/O ports static configuration as defined in @p board.h.

- *          This variable is used by the HAL when initializing the PAL driver.

- */

-#if HAL_USE_PAL || defined(__DOXYGEN__)

-const PALConfig pal_default_config =

-{

-  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},

-  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},

-  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},

-  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},

-  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},

-};

-#endif

-

-/*

- * Early initialization code.

- * This initialization must be performed just after stack setup and before

- * any other initialization.

- */

-void __early_init(void) {

-

-  stm32_clock_init();

-}

-

-/*

- * Board-specific initialization code.

- */

-void boardInit(void) {

-}

+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#include "hal.h"
+
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+};
+#endif
+
+/*
+ * Early initialization code.
+ * This initialization must be performed just after stack setup and before
+ * any other initialization.
+ */
+void __early_init(void) {
+
+  stm32_clock_init();
+}
+
+/*
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+}
diff --git a/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.h b/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.h
index 7253e7782..b31d74307 100644
--- a/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.h
+++ b/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.h
@@ -1,166 +1,166 @@
-/*

-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-#ifndef _BOARD_H_

-#define _BOARD_H_

-

-/*

- * Setup for a Generic STM32F103 board.

- */

-

-/*

- * Board identifier.

- */

-#define BOARD_GENERIC_STM32_F103

-#define BOARD_NAME              "Generic STM32F103x board"

-

-/*

- * Board frequencies.

- */

-#define STM32_LSECLK            32768

-#define STM32_HSECLK            8000000

-

-/*

- * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.

- */

-#define STM32F103xB

-

-/*

- * IO pins assignments

- */

-

-/* on-board */

-

-#define GPIOC_LED               13

-#define GPIOD_OSC_IN            0

-#define GPIOD_OSC_OUT           1

-

-/* In case your board has a "USB enable" hardware

-   controlled by a pin, define it here. (It could be just

-   a 1.5k resistor connected to D+ line.)

-*/

-/*

-#define GPIOB_USB_DISC          10

-*/

-

-/*

- * I/O ports initial setup, this configuration is established soon after reset

- * in the initialization code.

- *

- * The digits have the following meaning:

- *   0 - Analog input.

- *   1 - Push Pull output 10MHz.

- *   2 - Push Pull output 2MHz.

- *   3 - Push Pull output 50MHz.

- *   4 - Digital input.

- *   5 - Open Drain output 10MHz.

- *   6 - Open Drain output 2MHz.

- *   7 - Open Drain output 50MHz.

- *   8 - Digital input with PullUp or PullDown resistor depending on ODR.

- *   9 - Alternate Push Pull output 10MHz.

- *   A - Alternate Push Pull output 2MHz.

- *   B - Alternate Push Pull output 50MHz.

- *   C - Reserved.

- *   D - Alternate Open Drain output 10MHz.

- *   E - Alternate Open Drain output 2MHz.

- *   F - Alternate Open Drain output 50MHz.

- * Please refer to the STM32 Reference Manual for details.

- */

-

-/*

- * Port A setup.

- * Everything input with pull-up except:

- * PA2  - Alternate output  (USART2 TX).

- * PA3  - Normal input      (USART2 RX).

- * PA9  - Alternate output  (USART1 TX).

- * PA10 - Normal input      (USART1 RX).

- */

-#define VAL_GPIOACRL            0x88884B88      /*  PA7...PA0 */

-#define VAL_GPIOACRH            0x888884B8      /* PA15...PA8 */

-#define VAL_GPIOAODR            0xFFFFFFFF

-

-/*

- * Port B setup.

- * Everything input with pull-up except:

- * PB10    - Push Pull output  (USB switch).

- */

-#define VAL_GPIOBCRL            0x88888888      /*  PB7...PB0 */

-#define VAL_GPIOBCRH            0x88888388      /* PB15...PB8 */

-#define VAL_GPIOBODR            0xFFFFFFFF

-

-/*

- * Port C setup.

- * Everything input with pull-up except:

- * PC13    - Push Pull output  (LED).

- */

-#define VAL_GPIOCCRL            0x88888888      /*  PC7...PC0 */

-#define VAL_GPIOCCRH            0x88388888      /* PC15...PC8 */

-#define VAL_GPIOCODR            0xFFFFFFFF

-

-/*

- * Port D setup.

- * Everything input with pull-up except:

- * PD0  - Normal input (XTAL).

- * PD1  - Normal input (XTAL).

- */

-#define VAL_GPIODCRL            0x88888844      /*  PD7...PD0 */

-#define VAL_GPIODCRH            0x88888888      /* PD15...PD8 */

-#define VAL_GPIODODR            0xFFFFFFFF

-

-/*

- * Port E setup.

- * Everything input with pull-up except:

- */

-#define VAL_GPIOECRL            0x88888888      /*  PE7...PE0 */

-#define VAL_GPIOECRH            0x88888888      /* PE15...PE8 */

-#define VAL_GPIOEODR            0xFFFFFFFF

-

-/*

- * USB bus activation macro, required by the USB driver.

- */

-/* The point is that most of the generic STM32F103* boards

-   have a 1.5k resistor connected on one end to the D+ line

-   and on the other end to some pin. Or even a slightly more

-   complicated "USB enable" circuit, controlled by a pin.

-   That should go here.

-

-   However on some boards (e.g. one that I have), there's no

-   such hardware. In which case it's better to not do anything.

-*/

-/*

-#define usb_lld_connect_bus(usbp) palClearPad(GPIOB, GPIOB_USB_DISC)

-*/

-#define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT);

-

-/*

- * USB bus de-activation macro, required by the USB driver.

- */

-/*

-#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOB, GPIOB_USB_DISC)

-*/

-#define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12);

-

-#if !defined(_FROM_ASM_)

-#ifdef __cplusplus

-extern "C" {

-#endif

-  void boardInit(void);

-#ifdef __cplusplus

-}

-#endif

-#endif /* _FROM_ASM_ */

-

-#endif /* _BOARD_H_ */

+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for a Generic STM32F103 board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_GENERIC_STM32_F103
+#define BOARD_NAME              "Generic STM32F103x board"
+
+/*
+ * Board frequencies.
+ */
+#define STM32_LSECLK            32768
+#define STM32_HSECLK            8000000
+
+/*
+ * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
+ */
+#define STM32F103xB
+
+/*
+ * IO pins assignments
+ */
+
+/* on-board */
+
+#define GPIOC_LED               13
+#define GPIOD_OSC_IN            0
+#define GPIOD_OSC_OUT           1
+
+/* In case your board has a "USB enable" hardware
+   controlled by a pin, define it here. (It could be just
+   a 1.5k resistor connected to D+ line.)
+*/
+/*
+#define GPIOB_USB_DISC          10
+*/
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ *
+ * The digits have the following meaning:
+ *   0 - Analog input.
+ *   1 - Push Pull output 10MHz.
+ *   2 - Push Pull output 2MHz.
+ *   3 - Push Pull output 50MHz.
+ *   4 - Digital input.
+ *   5 - Open Drain output 10MHz.
+ *   6 - Open Drain output 2MHz.
+ *   7 - Open Drain output 50MHz.
+ *   8 - Digital input with PullUp or PullDown resistor depending on ODR.
+ *   9 - Alternate Push Pull output 10MHz.
+ *   A - Alternate Push Pull output 2MHz.
+ *   B - Alternate Push Pull output 50MHz.
+ *   C - Reserved.
+ *   D - Alternate Open Drain output 10MHz.
+ *   E - Alternate Open Drain output 2MHz.
+ *   F - Alternate Open Drain output 50MHz.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+
+/*
+ * Port A setup.
+ * Everything input with pull-up except:
+ * PA2  - Alternate output  (USART2 TX).
+ * PA3  - Normal input      (USART2 RX).
+ * PA9  - Alternate output  (USART1 TX).
+ * PA10 - Normal input      (USART1 RX).
+ */
+#define VAL_GPIOACRL            0x88884B88      /*  PA7...PA0 */
+#define VAL_GPIOACRH            0x888884B8      /* PA15...PA8 */
+#define VAL_GPIOAODR            0xFFFFFFFF
+
+/*
+ * Port B setup.
+ * Everything input with pull-up except:
+ * PB10    - Push Pull output  (USB switch).
+ */
+#define VAL_GPIOBCRL            0x88888888      /*  PB7...PB0 */
+#define VAL_GPIOBCRH            0x88888388      /* PB15...PB8 */
+#define VAL_GPIOBODR            0xFFFFFFFF
+
+/*
+ * Port C setup.
+ * Everything input with pull-up except:
+ * PC13    - Push Pull output  (LED).
+ */
+#define VAL_GPIOCCRL            0x88888888      /*  PC7...PC0 */
+#define VAL_GPIOCCRH            0x88388888      /* PC15...PC8 */
+#define VAL_GPIOCODR            0xFFFFFFFF
+
+/*
+ * Port D setup.
+ * Everything input with pull-up except:
+ * PD0  - Normal input (XTAL).
+ * PD1  - Normal input (XTAL).
+ */
+#define VAL_GPIODCRL            0x88888844      /*  PD7...PD0 */
+#define VAL_GPIODCRH            0x88888888      /* PD15...PD8 */
+#define VAL_GPIODODR            0xFFFFFFFF
+
+/*
+ * Port E setup.
+ * Everything input with pull-up except:
+ */
+#define VAL_GPIOECRL            0x88888888      /*  PE7...PE0 */
+#define VAL_GPIOECRH            0x88888888      /* PE15...PE8 */
+#define VAL_GPIOEODR            0xFFFFFFFF
+
+/*
+ * USB bus activation macro, required by the USB driver.
+ */
+/* The point is that most of the generic STM32F103* boards
+   have a 1.5k resistor connected on one end to the D+ line
+   and on the other end to some pin. Or even a slightly more
+   complicated "USB enable" circuit, controlled by a pin.
+   That should go here.
+
+   However on some boards (e.g. one that I have), there's no
+   such hardware. In which case it's better to not do anything.
+*/
+/*
+#define usb_lld_connect_bus(usbp) palClearPad(GPIOB, GPIOB_USB_DISC)
+*/
+#define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT);
+
+/*
+ * USB bus de-activation macro, required by the USB driver.
+ */
+/*
+#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOB, GPIOB_USB_DISC)
+*/
+#define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12);
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.mk b/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.mk
index d692c0ee4..48e0e51fe 100644
--- a/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.mk
+++ b/keyboards/chibios_test/boards/GENERIC_STM32_F103/board.mk
@@ -1,5 +1,5 @@
-# List of all the board related files.

-BOARDSRC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F103/board.c

-

-# Required include directories

-BOARDINC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F103

+# List of all the board related files.
+BOARDSRC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F103/board.c
+
+# Required include directories
+BOARDINC = $(KEYBOARD_PATH)/boards/GENERIC_STM32_F103
diff --git a/keyboards/chibios_test/ld/MKL26Z64.ld b/keyboards/chibios_test/ld/MKL26Z64.ld
index fb141f888..c4ca8b874 100644
--- a/keyboards/chibios_test/ld/MKL26Z64.ld
+++ b/keyboards/chibios_test/ld/MKL26Z64.ld
@@ -1,105 +1,105 @@
-/*

- * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com

- *           (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>

- *

- * Permission is hereby granted, free of charge, to any person obtaining

- * a copy of this software and associated documentation files (the "Software"),

- * to deal in the Software without restriction, including without limitation

- * the rights to use, copy, modify, merge, publish, distribute, sublicense,

- * and/or sell copies of the Software, and to permit persons to whom the

- * Software is furnished to do so, subject to the following conditions:

- *

- * The above copyright notice and this permission notice shall be included in

- * all copies or substantial portions of the Software.

- *

- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS

- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE

- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE

- * SOFTWARE.

- */

-

-/*

- * KL26Z64 memory setup.

- */

-MEMORY

-{

-  flash0   : org = 0x00000000, len = 0x100

-  flash1   : org = 0x00000400, len = 0x10

-  flash2   : org = 0x00000410, len = 62k - 0x410

-  flash3   : org = 0x0000F800, len = 2k

-  flash4   : org = 0x00000000, len = 0

-  flash5   : org = 0x00000000, len = 0

-  flash6   : org = 0x00000000, len = 0

-  flash7   : org = 0x00000000, len = 0

-  ram0     : org = 0x1FFFF800, len = 8k

-  ram1     : org = 0x00000000, len = 0

-  ram2     : org = 0x00000000, len = 0

-  ram3     : org = 0x00000000, len = 0

-  ram4     : org = 0x00000000, len = 0

-  ram5     : org = 0x00000000, len = 0

-  ram6     : org = 0x00000000, len = 0

-  ram7     : org = 0x00000000, len = 0

-}

-

-/* Flash region for the configuration bytes.*/

-SECTIONS

-{

-  .cfmprotect : ALIGN(4) SUBALIGN(4)

-  {

-    KEEP(*(.cfmconfig))

-  } > flash1

-}

-

-/* For each data/text section two region are defined, a virtual region

-   and a load region (_LMA suffix).*/

-

-/* Flash region to be used for exception vectors.*/

-REGION_ALIAS("VECTORS_FLASH", flash0);

-REGION_ALIAS("VECTORS_FLASH_LMA", flash0);

-

-/* Flash region to be used for constructors and destructors.*/

-REGION_ALIAS("XTORS_FLASH", flash2);

-REGION_ALIAS("XTORS_FLASH_LMA", flash2);

-

-/* Flash region to be used for code text.*/

-REGION_ALIAS("TEXT_FLASH", flash2);

-REGION_ALIAS("TEXT_FLASH_LMA", flash2);

-

-/* Flash region to be used for read only data.*/

-REGION_ALIAS("RODATA_FLASH", flash2);

-REGION_ALIAS("RODATA_FLASH_LMA", flash2);

-

-/* Flash region to be used for various.*/

-REGION_ALIAS("VARIOUS_FLASH", flash2);

-REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);

-

-/* Flash region to be used for RAM(n) initialization data.*/

-REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);

-

-/* RAM region to be used for Main stack. This stack accommodates the processing

-   of all exceptions and interrupts.*/

-REGION_ALIAS("MAIN_STACK_RAM", ram0);

-

-/* RAM region to be used for the process stack. This is the stack used by

-   the main() function.*/

-REGION_ALIAS("PROCESS_STACK_RAM", ram0);

-

-/* RAM region to be used for data segment.*/

-REGION_ALIAS("DATA_RAM", ram0);

-REGION_ALIAS("DATA_RAM_LMA", flash2);

-

-/* RAM region to be used for BSS segment.*/

-REGION_ALIAS("BSS_RAM", ram0);

-

-/* RAM region to be used for the default heap.*/

-REGION_ALIAS("HEAP_RAM", ram0);

-

-__eeprom_workarea_start__ = ORIGIN(flash3);

-__eeprom_workarea_size__  = LENGTH(flash3);

-__eeprom_workarea_end__   = __eeprom_workarea_start__ + __eeprom_workarea_size__;

-

-/* Generic rules inclusion.*/

-INCLUDE rules.ld

+/*
+ * Copyright (C) 2013-2016 Fabio Utzig, http://fabioutzig.com
+ *           (C) 2016 flabbergast <s3+flabbergast@sdfeu.org>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining
+ * a copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/*
+ * KL26Z64 memory setup.
+ */
+MEMORY
+{
+  flash0   : org = 0x00000000, len = 0x100
+  flash1   : org = 0x00000400, len = 0x10
+  flash2   : org = 0x00000410, len = 62k - 0x410
+  flash3   : org = 0x0000F800, len = 2k
+  flash4   : org = 0x00000000, len = 0
+  flash5   : org = 0x00000000, len = 0
+  flash6   : org = 0x00000000, len = 0
+  flash7   : org = 0x00000000, len = 0
+  ram0     : org = 0x1FFFF800, len = 8k
+  ram1     : org = 0x00000000, len = 0
+  ram2     : org = 0x00000000, len = 0
+  ram3     : org = 0x00000000, len = 0
+  ram4     : org = 0x00000000, len = 0
+  ram5     : org = 0x00000000, len = 0
+  ram6     : org = 0x00000000, len = 0
+  ram7     : org = 0x00000000, len = 0
+}
+
+/* Flash region for the configuration bytes.*/
+SECTIONS
+{
+  .cfmprotect : ALIGN(4) SUBALIGN(4)
+  {
+    KEEP(*(.cfmconfig))
+  } > flash1
+}
+
+/* For each data/text section two region are defined, a virtual region
+   and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash2);
+REGION_ALIAS("XTORS_FLASH_LMA", flash2);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash2);
+REGION_ALIAS("TEXT_FLASH_LMA", flash2);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash2);
+REGION_ALIAS("RODATA_FLASH_LMA", flash2);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash2);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash2);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash2);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+   of all exceptions and interrupts.*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+   the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash2);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+__eeprom_workarea_start__ = ORIGIN(flash3);
+__eeprom_workarea_size__  = LENGTH(flash3);
+__eeprom_workarea_end__   = __eeprom_workarea_start__ + __eeprom_workarea_size__;
+
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/keyboards/chibios_test/ld/STM32F103x8_stm32duino_bootloader.ld b/keyboards/chibios_test/ld/STM32F103x8_stm32duino_bootloader.ld
index 00613328e..f9bfe9c00 100644
--- a/keyboards/chibios_test/ld/STM32F103x8_stm32duino_bootloader.ld
+++ b/keyboards/chibios_test/ld/STM32F103x8_stm32duino_bootloader.ld
@@ -1,88 +1,88 @@
-/*

-    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-/*

- * ST32F103xB memory setup for use with the maplemini bootloader.

- * You will have to

- * 	#define CORTEX_VTOR_INIT 0x5000

- * in your projects chconf.h

- */

-MEMORY

-{

-    flash0  : org = 0x08002000, len = 128k - 0x2000

-    flash1  : org = 0x00000000, len = 0

-    flash2  : org = 0x00000000, len = 0

-    flash3  : org = 0x00000000, len = 0

-    flash4  : org = 0x00000000, len = 0

-    flash5  : org = 0x00000000, len = 0

-    flash6  : org = 0x00000000, len = 0

-    flash7  : org = 0x00000000, len = 0

-    ram0    : org = 0x20000000, len = 20k

-    ram1    : org = 0x00000000, len = 0

-    ram2    : org = 0x00000000, len = 0

-    ram3    : org = 0x00000000, len = 0

-    ram4    : org = 0x00000000, len = 0

-    ram5    : org = 0x00000000, len = 0

-    ram6    : org = 0x00000000, len = 0

-    ram7    : org = 0x00000000, len = 0

-}

-

-/* For each data/text section two region are defined, a virtual region

-   and a load region (_LMA suffix).*/

-

-/* Flash region to be used for exception vectors.*/

-REGION_ALIAS("VECTORS_FLASH", flash0);

-REGION_ALIAS("VECTORS_FLASH_LMA", flash0);

-

-/* Flash region to be used for constructors and destructors.*/

-REGION_ALIAS("XTORS_FLASH", flash0);

-REGION_ALIAS("XTORS_FLASH_LMA", flash0);

-

-/* Flash region to be used for code text.*/

-REGION_ALIAS("TEXT_FLASH", flash0);

-REGION_ALIAS("TEXT_FLASH_LMA", flash0);

-

-/* Flash region to be used for read only data.*/

-REGION_ALIAS("RODATA_FLASH", flash0);

-REGION_ALIAS("RODATA_FLASH_LMA", flash0);

-

-/* Flash region to be used for various.*/

-REGION_ALIAS("VARIOUS_FLASH", flash0);

-REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);

-

-/* Flash region to be used for RAM(n) initialization data.*/

-REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);

-

-/* RAM region to be used for Main stack. This stack accommodates the processing

-   of all exceptions and interrupts.*/

-REGION_ALIAS("MAIN_STACK_RAM", ram0);

-

-/* RAM region to be used for the process stack. This is the stack used by

-   the main() function.*/

-REGION_ALIAS("PROCESS_STACK_RAM", ram0);

-

-/* RAM region to be used for data segment.*/

-REGION_ALIAS("DATA_RAM", ram0);

-REGION_ALIAS("DATA_RAM_LMA", flash0);

-

-/* RAM region to be used for BSS segment.*/

-REGION_ALIAS("BSS_RAM", ram0);

-

-/* RAM region to be used for the default heap.*/

-REGION_ALIAS("HEAP_RAM", ram0);

-

-/* Generic rules inclusion.*/

-INCLUDE rules.ld

+/*
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/*
+ * ST32F103xB memory setup for use with the maplemini bootloader.
+ * You will have to
+ * 	#define CORTEX_VTOR_INIT 0x5000
+ * in your projects chconf.h
+ */
+MEMORY
+{
+    flash0  : org = 0x08002000, len = 128k - 0x2000
+    flash1  : org = 0x00000000, len = 0
+    flash2  : org = 0x00000000, len = 0
+    flash3  : org = 0x00000000, len = 0
+    flash4  : org = 0x00000000, len = 0
+    flash5  : org = 0x00000000, len = 0
+    flash6  : org = 0x00000000, len = 0
+    flash7  : org = 0x00000000, len = 0
+    ram0    : org = 0x20000000, len = 20k
+    ram1    : org = 0x00000000, len = 0
+    ram2    : org = 0x00000000, len = 0
+    ram3    : org = 0x00000000, len = 0
+    ram4    : org = 0x00000000, len = 0
+    ram5    : org = 0x00000000, len = 0
+    ram6    : org = 0x00000000, len = 0
+    ram7    : org = 0x00000000, len = 0
+}
+
+/* For each data/text section two region are defined, a virtual region
+   and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+   of all exceptions and interrupts.*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+   the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/keyboards/chibios_test/stm32_f072_onekey/mcuconf.h b/keyboards/chibios_test/stm32_f072_onekey/mcuconf.h
index 3d877aaa2..faca3defd 100644
--- a/keyboards/chibios_test/stm32_f072_onekey/mcuconf.h
+++ b/keyboards/chibios_test/stm32_f072_onekey/mcuconf.h
@@ -1,171 +1,171 @@
-/*

-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-#ifndef _MCUCONF_H_

-#define _MCUCONF_H_

-

-/*

- * STM32F0xx drivers configuration.

- * The following settings override the default settings present in

- * the various device driver implementation headers.

- * Note that the settings for each driver only have effect if the whole

- * driver is enabled in halconf.h.

- *

- * IRQ priorities:

- * 3...0       Lowest...Highest.

- *

- * DMA priorities:

- * 0...3        Lowest...Highest.

- */

-

-#define STM32F0xx_MCUCONF

-

-/*

- * HAL driver system settings.

- */

-#define STM32_NO_INIT                       FALSE

-#define STM32_PVD_ENABLE                    FALSE

-#define STM32_PLS                           STM32_PLS_LEV0

-#define STM32_HSI_ENABLED                   TRUE

-#define STM32_HSI14_ENABLED                 TRUE

-#define STM32_HSI48_ENABLED                 FALSE

-#define STM32_LSI_ENABLED                   TRUE

-#define STM32_HSE_ENABLED                   FALSE

-#define STM32_LSE_ENABLED                   FALSE

-#define STM32_SW                            STM32_SW_PLL

-#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2

-#define STM32_PREDIV_VALUE                  1

-#define STM32_PLLMUL_VALUE                  12

-#define STM32_HPRE                          STM32_HPRE_DIV1

-#define STM32_PPRE                          STM32_PPRE_DIV1

-#define STM32_ADCSW                         STM32_ADCSW_HSI14

-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

-#define STM32_ADCSW                         STM32_ADCSW_HSI14

-#define STM32_USBSW                         STM32_USBSW_HSI48

-#define STM32_CECSW                         STM32_CECSW_HSI

-#define STM32_I2C1SW                        STM32_I2C1SW_HSI

-#define STM32_USART1SW                      STM32_USART1SW_PCLK

-#define STM32_RTCSEL                        STM32_RTCSEL_LSI

-

-/*

- * ADC driver system settings.

- */

-#define STM32_ADC_USE_ADC1                  FALSE

-#define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_IRQ_PRIORITY              2

-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2

-

-/*

- * EXT driver system settings.

- */

-#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3

-#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3

-#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3

-#define STM32_EXT_EXTI16_IRQ_PRIORITY       3

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       3

-

-/*

- * GPT driver system settings.

- */

-#define STM32_GPT_USE_TIM1                  FALSE

-#define STM32_GPT_USE_TIM2                  FALSE

-#define STM32_GPT_USE_TIM3                  FALSE

-#define STM32_GPT_USE_TIM14                 FALSE

-#define STM32_GPT_TIM1_IRQ_PRIORITY         2

-#define STM32_GPT_TIM2_IRQ_PRIORITY         2

-#define STM32_GPT_TIM3_IRQ_PRIORITY         2

-#define STM32_GPT_TIM14_IRQ_PRIORITY        2

-

-/*

- * I2C driver system settings.

- */

-#define STM32_I2C_USE_I2C1                  FALSE

-#define STM32_I2C_USE_I2C2                  FALSE

-#define STM32_I2C_BUSY_TIMEOUT              50

-#define STM32_I2C_I2C1_IRQ_PRIORITY         3

-#define STM32_I2C_I2C2_IRQ_PRIORITY         3

-#define STM32_I2C_USE_DMA                   TRUE

-#define STM32_I2C_I2C1_DMA_PRIORITY         1

-#define STM32_I2C_I2C2_DMA_PRIORITY         1

-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

-

-/*

- * ICU driver system settings.

- */

-#define STM32_ICU_USE_TIM1                  FALSE

-#define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  FALSE

-#define STM32_ICU_TIM1_IRQ_PRIORITY         3

-#define STM32_ICU_TIM2_IRQ_PRIORITY         3

-#define STM32_ICU_TIM3_IRQ_PRIORITY         3

-

-/*

- * PWM driver system settings.

- */

-#define STM32_PWM_USE_ADVANCED              FALSE

-#define STM32_PWM_USE_TIM1                  FALSE

-#define STM32_PWM_USE_TIM2                  FALSE

-#define STM32_PWM_USE_TIM3                  FALSE

-#define STM32_PWM_TIM1_IRQ_PRIORITY         3

-#define STM32_PWM_TIM2_IRQ_PRIORITY         3

-#define STM32_PWM_TIM3_IRQ_PRIORITY         3

-

-/*

- * SERIAL driver system settings.

- */

-#define STM32_SERIAL_USE_USART1             FALSE

-#define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USART1_PRIORITY        3

-#define STM32_SERIAL_USART2_PRIORITY        3

-

-/*

- * SPI driver system settings.

- */

-#define STM32_SPI_USE_SPI1                  FALSE

-#define STM32_SPI_USE_SPI2                  FALSE

-#define STM32_SPI_SPI1_DMA_PRIORITY         1

-#define STM32_SPI_SPI2_DMA_PRIORITY         1

-#define STM32_SPI_SPI1_IRQ_PRIORITY         2

-#define STM32_SPI_SPI2_IRQ_PRIORITY         2

-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

-

-/*

- * ST driver system settings.

- */

-#define STM32_ST_IRQ_PRIORITY               2

-#define STM32_ST_USE_TIMER                  2

-

-/*

- * UART driver system settings.

- */

-#define STM32_UART_USE_USART1               FALSE

-#define STM32_UART_USE_USART2               FALSE

-#define STM32_UART_USART1_IRQ_PRIORITY      3

-#define STM32_UART_USART2_IRQ_PRIORITY      3

-#define STM32_UART_USART1_DMA_PRIORITY      0

-#define STM32_UART_USART2_DMA_PRIORITY      0

-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

-

-/*

- * USB driver system settings.

- */

-#define STM32_USB_USE_USB1                  TRUE

-#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE

-#define STM32_USB_USB1_LP_IRQ_PRIORITY      3

-

-#endif /* _MCUCONF_H_ */

+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+/*
+ * STM32F0xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 3...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+#define STM32F0xx_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_HSI14_ENABLED                 TRUE
+#define STM32_HSI48_ENABLED                 FALSE
+#define STM32_LSI_ENABLED                   TRUE
+#define STM32_HSE_ENABLED                   FALSE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSI_DIV2
+#define STM32_PREDIV_VALUE                  1
+#define STM32_PLLMUL_VALUE                  12
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE                          STM32_PPRE_DIV1
+#define STM32_ADCSW                         STM32_ADCSW_HSI14
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_ADCSW                         STM32_ADCSW_HSI14
+#define STM32_USBSW                         STM32_USBSW_HSI48
+#define STM32_CECSW                         STM32_CECSW_HSI
+#define STM32_I2C1SW                        STM32_I2C1SW_HSI
+#define STM32_USART1SW                      STM32_USART1SW_PCLK
+#define STM32_RTCSEL                        STM32_RTCSEL_LSI
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_IRQ_PRIORITY              2
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     2
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_1_IRQ_PRIORITY      3
+#define STM32_EXT_EXTI2_3_IRQ_PRIORITY      3
+#define STM32_EXT_EXTI4_15_IRQ_PRIORITY     3
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       3
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       3
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  FALSE
+#define STM32_GPT_USE_TIM14                 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         2
+#define STM32_GPT_TIM2_IRQ_PRIORITY         2
+#define STM32_GPT_TIM3_IRQ_PRIORITY         2
+#define STM32_GPT_TIM14_IRQ_PRIORITY        2
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_IRQ_PRIORITY         3
+#define STM32_I2C_I2C2_IRQ_PRIORITY         3
+#define STM32_I2C_USE_DMA                   TRUE
+#define STM32_I2C_I2C1_DMA_PRIORITY         1
+#define STM32_I2C_I2C2_DMA_PRIORITY         1
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         3
+#define STM32_ICU_TIM2_IRQ_PRIORITY         3
+#define STM32_ICU_TIM3_IRQ_PRIORITY         3
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM3                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         3
+#define STM32_PWM_TIM2_IRQ_PRIORITY         3
+#define STM32_PWM_TIM3_IRQ_PRIORITY         3
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             FALSE
+#define STM32_SERIAL_USE_USART2             FALSE
+#define STM32_SERIAL_USART1_PRIORITY        3
+#define STM32_SERIAL_USART2_PRIORITY        3
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  FALSE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         2
+#define STM32_SPI_SPI2_IRQ_PRIORITY         2
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               2
+#define STM32_ST_USE_TIMER                  2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY      3
+#define STM32_UART_USART2_IRQ_PRIORITY      3
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1                  TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
+#define STM32_USB_USB1_LP_IRQ_PRIORITY      3
+
+#endif /* _MCUCONF_H_ */
diff --git a/keyboards/chibios_test/stm32_f103_onekey/mcuconf.h b/keyboards/chibios_test/stm32_f103_onekey/mcuconf.h
index 626332a6a..276829216 100644
--- a/keyboards/chibios_test/stm32_f103_onekey/mcuconf.h
+++ b/keyboards/chibios_test/stm32_f103_onekey/mcuconf.h
@@ -1,209 +1,209 @@
-/*

-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-#ifndef _MCUCONF_H_

-#define _MCUCONF_H_

-

-#define STM32F103_MCUCONF

-

-/*

- * STM32F103 drivers configuration.

- * The following settings override the default settings present in

- * the various device driver implementation headers.

- * Note that the settings for each driver only have effect if the whole

- * driver is enabled in halconf.h.

- *

- * IRQ priorities:

- * 15...0       Lowest...Highest.

- *

- * DMA priorities:

- * 0...3        Lowest...Highest.

- */

-

-/*

- * HAL driver system settings.

- */

-#define STM32_NO_INIT                       FALSE

-#define STM32_HSI_ENABLED                   TRUE

-#define STM32_LSI_ENABLED                   FALSE

-#define STM32_HSE_ENABLED                   TRUE

-#define STM32_LSE_ENABLED                   FALSE

-#define STM32_SW                            STM32_SW_PLL

-#define STM32_PLLSRC                        STM32_PLLSRC_HSE

-#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1

-#define STM32_PLLMUL_VALUE                  9

-#define STM32_HPRE                          STM32_HPRE_DIV1

-#define STM32_PPRE1                         STM32_PPRE1_DIV2

-#define STM32_PPRE2                         STM32_PPRE2_DIV2

-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4

-#define STM32_USB_CLOCK_REQUIRED            TRUE

-#define STM32_USBPRE                        STM32_USBPRE_DIV1P5

-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK

-#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV

-#define STM32_PVD_ENABLE                    FALSE

-#define STM32_PLS                           STM32_PLS_LEV0

-

-/*

- * ADC driver system settings.

- */

-#define STM32_ADC_USE_ADC1                  FALSE

-#define STM32_ADC_ADC1_DMA_PRIORITY         2

-#define STM32_ADC_ADC1_IRQ_PRIORITY         6

-

-/*

- * CAN driver system settings.

- */

-#define STM32_CAN_USE_CAN1                  FALSE

-#define STM32_CAN_CAN1_IRQ_PRIORITY         11

-

-/*

- * EXT driver system settings.

- */

-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6

-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6

-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6

-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6

-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6

-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6

-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6

-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6

-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6

-

-/*

- * GPT driver system settings.

- */

-#define STM32_GPT_USE_TIM1                  FALSE

-#define STM32_GPT_USE_TIM2                  FALSE

-#define STM32_GPT_USE_TIM3                  FALSE

-#define STM32_GPT_USE_TIM4                  FALSE

-#define STM32_GPT_USE_TIM5                  FALSE

-#define STM32_GPT_USE_TIM8                  FALSE

-#define STM32_GPT_TIM1_IRQ_PRIORITY         7

-#define STM32_GPT_TIM2_IRQ_PRIORITY         7

-#define STM32_GPT_TIM3_IRQ_PRIORITY         7

-#define STM32_GPT_TIM4_IRQ_PRIORITY         7

-#define STM32_GPT_TIM5_IRQ_PRIORITY         7

-#define STM32_GPT_TIM8_IRQ_PRIORITY         7

-

-/*

- * I2C driver system settings.

- */

-#define STM32_I2C_USE_I2C1                  FALSE

-#define STM32_I2C_USE_I2C2                  FALSE

-#define STM32_I2C_BUSY_TIMEOUT              50

-#define STM32_I2C_I2C1_IRQ_PRIORITY         5

-#define STM32_I2C_I2C2_IRQ_PRIORITY         5

-#define STM32_I2C_I2C1_DMA_PRIORITY         3

-#define STM32_I2C_I2C2_DMA_PRIORITY         3

-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")

-

-/*

- * ICU driver system settings.

- */

-#define STM32_ICU_USE_TIM1                  FALSE

-#define STM32_ICU_USE_TIM2                  FALSE

-#define STM32_ICU_USE_TIM3                  FALSE

-#define STM32_ICU_USE_TIM4                  FALSE

-#define STM32_ICU_USE_TIM5                  FALSE

-#define STM32_ICU_USE_TIM8                  FALSE

-#define STM32_ICU_TIM1_IRQ_PRIORITY         7

-#define STM32_ICU_TIM2_IRQ_PRIORITY         7

-#define STM32_ICU_TIM3_IRQ_PRIORITY         7

-#define STM32_ICU_TIM4_IRQ_PRIORITY         7

-#define STM32_ICU_TIM5_IRQ_PRIORITY         7

-#define STM32_ICU_TIM8_IRQ_PRIORITY         7

-

-/*

- * PWM driver system settings.

- */

-#define STM32_PWM_USE_ADVANCED              FALSE

-#define STM32_PWM_USE_TIM1                  FALSE

-#define STM32_PWM_USE_TIM2                  FALSE

-#define STM32_PWM_USE_TIM3                  FALSE

-#define STM32_PWM_USE_TIM4                  FALSE

-#define STM32_PWM_USE_TIM5                  FALSE

-#define STM32_PWM_USE_TIM8                  FALSE

-#define STM32_PWM_TIM1_IRQ_PRIORITY         7

-#define STM32_PWM_TIM2_IRQ_PRIORITY         7

-#define STM32_PWM_TIM3_IRQ_PRIORITY         7

-#define STM32_PWM_TIM4_IRQ_PRIORITY         7

-#define STM32_PWM_TIM5_IRQ_PRIORITY         7

-#define STM32_PWM_TIM8_IRQ_PRIORITY         7

-

-/*

- * RTC driver system settings.

- */

-#define STM32_RTC_IRQ_PRIORITY              15

-

-/*

- * SERIAL driver system settings.

- */

-#define STM32_SERIAL_USE_USART1             FALSE

-#define STM32_SERIAL_USE_USART2             FALSE

-#define STM32_SERIAL_USE_USART3             FALSE

-#define STM32_SERIAL_USE_UART4              FALSE

-#define STM32_SERIAL_USE_UART5              FALSE

-#define STM32_SERIAL_USART1_PRIORITY        12

-#define STM32_SERIAL_USART2_PRIORITY        12

-#define STM32_SERIAL_USART3_PRIORITY        12

-#define STM32_SERIAL_UART4_PRIORITY         12

-#define STM32_SERIAL_UART5_PRIORITY         12

-

-/*

- * SPI driver system settings.

- */

-#define STM32_SPI_USE_SPI1                  FALSE

-#define STM32_SPI_USE_SPI2                  FALSE

-#define STM32_SPI_USE_SPI3                  FALSE

-#define STM32_SPI_SPI1_DMA_PRIORITY         1

-#define STM32_SPI_SPI2_DMA_PRIORITY         1

-#define STM32_SPI_SPI3_DMA_PRIORITY         1

-#define STM32_SPI_SPI1_IRQ_PRIORITY         10

-#define STM32_SPI_SPI2_IRQ_PRIORITY         10

-#define STM32_SPI_SPI3_IRQ_PRIORITY         10

-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")

-

-/*

- * ST driver system settings.

- */

-#define STM32_ST_IRQ_PRIORITY               8

-#define STM32_ST_USE_TIMER                  2

-

-/*

- * UART driver system settings.

- */

-#define STM32_UART_USE_USART1               FALSE

-#define STM32_UART_USE_USART2               FALSE

-#define STM32_UART_USE_USART3               FALSE

-#define STM32_UART_USART1_IRQ_PRIORITY      12

-#define STM32_UART_USART2_IRQ_PRIORITY      12

-#define STM32_UART_USART3_IRQ_PRIORITY      12

-#define STM32_UART_USART1_DMA_PRIORITY      0

-#define STM32_UART_USART2_DMA_PRIORITY      0

-#define STM32_UART_USART3_DMA_PRIORITY      0

-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")

-

-/*

- * USB driver system settings.

- */

-#define STM32_USB_USE_USB1                  TRUE

-#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE

-#define STM32_USB_USB1_HP_IRQ_PRIORITY      13

-#define STM32_USB_USB1_LP_IRQ_PRIORITY      14

-

-#endif /* _MCUCONF_H_ */

+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+#define STM32F103_MCUCONF
+
+/*
+ * STM32F103 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE                  9
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV2
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC1_IRQ_PRIORITY         6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  FALSE
+#define STM32_GPT_USE_TIM4                  FALSE
+#define STM32_GPT_USE_TIM5                  FALSE
+#define STM32_GPT_USE_TIM8                  FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7
+#define STM32_GPT_TIM3_IRQ_PRIORITY         7
+#define STM32_GPT_TIM4_IRQ_PRIORITY         7
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_USE_TIM4                  FALSE
+#define STM32_ICU_USE_TIM5                  FALSE
+#define STM32_ICU_USE_TIM8                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM3                  FALSE
+#define STM32_PWM_USE_TIM4                  FALSE
+#define STM32_PWM_USE_TIM5                  FALSE
+#define STM32_PWM_USE_TIM8                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_IRQ_PRIORITY              15
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             FALSE
+#define STM32_SERIAL_USE_USART2             FALSE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_UART4              FALSE
+#define STM32_SERIAL_USE_UART5              FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_UART4_PRIORITY         12
+#define STM32_SERIAL_UART5_PRIORITY         12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  FALSE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               8
+#define STM32_ST_USE_TIMER                  2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               FALSE
+#define STM32_UART_USE_USART3               FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY      12
+#define STM32_UART_USART2_IRQ_PRIORITY      12
+#define STM32_UART_USART3_IRQ_PRIORITY      12
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_USART3_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1                  TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
+
+#endif /* _MCUCONF_H_ */
diff --git a/keyboards/chibios_test/teensy_lc_onekey/chconf.h b/keyboards/chibios_test/teensy_lc_onekey/chconf.h
index cb36996c3..3294ac7ee 100644
--- a/keyboards/chibios_test/teensy_lc_onekey/chconf.h
+++ b/keyboards/chibios_test/teensy_lc_onekey/chconf.h
@@ -1,524 +1,524 @@
-/*

-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-/**

- * @file    templates/chconf.h

- * @brief   Configuration file template.

- * @details A copy of this file must be placed in each project directory, it

- *          contains the application specific kernel settings.

- *

- * @addtogroup config

- * @details Kernel related settings and hooks.

- * @{

- */

-

-#ifndef CHCONF_H

-#define CHCONF_H

-

-#define _CHIBIOS_RT_CONF_

-

-/*===========================================================================*/

-/**

- * @name System timers settings

- * @{

- */

-/*===========================================================================*/

-

-/**

- * @brief   System time counter resolution.

- * @note    Allowed values are 16 or 32 bits.

- */

-#define CH_CFG_ST_RESOLUTION                32

-

-/**

- * @brief   System tick frequency.

- * @details Frequency of the system timer that drives the system ticks. This

- *          setting also defines the system tick time unit.

- */

-#define CH_CFG_ST_FREQUENCY                 1000

-

-/**

- * @brief   Time delta constant for the tick-less mode.

- * @note    If this value is zero then the system uses the classic

- *          periodic tick. This value represents the minimum number

- *          of ticks that is safe to specify in a timeout directive.

- *          The value one is not valid, timeouts are rounded up to

- *          this value.

- */

-#define CH_CFG_ST_TIMEDELTA                 0

-

-/** @} */

-

-/*===========================================================================*/

-/**

- * @name Kernel parameters and options

- * @{

- */

-/*===========================================================================*/

-

-/**

- * @brief   Round robin interval.

- * @details This constant is the number of system ticks allowed for the

- *          threads before preemption occurs. Setting this value to zero

- *          disables the preemption for threads with equal priority and the

- *          round robin becomes cooperative. Note that higher priority

- *          threads can still preempt, the kernel is always preemptive.

- * @note    Disabling the round robin preemption makes the kernel more compact

- *          and generally faster.

- * @note    The round robin preemption is not supported in tickless mode and

- *          must be set to zero in that case.

- */

-#define CH_CFG_TIME_QUANTUM                 20

-

-/**

- * @brief   Managed RAM size.

- * @details Size of the RAM area to be managed by the OS. If set to zero

- *          then the whole available RAM is used. The core memory is made

- *          available to the heap allocator and/or can be used directly through

- *          the simplified core memory allocator.

- *

- * @note    In order to let the OS manage the whole RAM the linker script must

- *          provide the @p __heap_base__ and @p __heap_end__ symbols.

- * @note    Requires @p CH_CFG_USE_MEMCORE.

- */

-#define CH_CFG_MEMCORE_SIZE                 0

-

-/**

- * @brief   Idle thread automatic spawn suppression.

- * @details When this option is activated the function @p chSysInit()

- *          does not spawn the idle thread. The application @p main()

- *          function becomes the idle thread and must implement an

- *          infinite loop.

- */

-#define CH_CFG_NO_IDLE_THREAD               FALSE

-

-/* Use __WFI in the idle thread for waiting. Does lower the power

- * consumption. */

-#define CORTEX_ENABLE_WFI_IDLE              TRUE

-

-/** @} */

-

-/*===========================================================================*/

-/**

- * @name Performance options

- * @{

- */

-/*===========================================================================*/

-

-/**

- * @brief   OS optimization.

- * @details If enabled then time efficient rather than space efficient code

- *          is used when two possible implementations exist.

- *

- * @note    This is not related to the compiler optimization options.

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_OPTIMIZE_SPEED               TRUE

-

-/** @} */

-

-/*===========================================================================*/

-/**

- * @name Subsystem options

- * @{

- */

-/*===========================================================================*/

-

-/**

- * @brief   Time Measurement APIs.

- * @details If enabled then the time measurement APIs are included in

- *          the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_TM                       FALSE

-

-/**

- * @brief   Threads registry APIs.

- * @details If enabled then the registry APIs are included in the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_REGISTRY                 TRUE

-

-/**

- * @brief   Threads synchronization APIs.

- * @details If enabled then the @p chThdWait() function is included in

- *          the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_WAITEXIT                 TRUE

-

-/**

- * @brief   Semaphores APIs.

- * @details If enabled then the Semaphores APIs are included in the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_SEMAPHORES               TRUE

-

-/**

- * @brief   Semaphores queuing mode.

- * @details If enabled then the threads are enqueued on semaphores by

- *          priority rather than in FIFO order.

- *

- * @note    The default is @p FALSE. Enable this if you have special

- *          requirements.

- * @note    Requires @p CH_CFG_USE_SEMAPHORES.

- */

-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE

-

-/**

- * @brief   Mutexes APIs.

- * @details If enabled then the mutexes APIs are included in the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_MUTEXES                  TRUE

-

-/**

- * @brief   Enables recursive behavior on mutexes.

- * @note    Recursive mutexes are heavier and have an increased

- *          memory footprint.

- *

- * @note    The default is @p FALSE.

- * @note    Requires @p CH_CFG_USE_MUTEXES.

- */

-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE

-

-/**

- * @brief   Conditional Variables APIs.

- * @details If enabled then the conditional variables APIs are included

- *          in the kernel.

- *

- * @note    The default is @p TRUE.

- * @note    Requires @p CH_CFG_USE_MUTEXES.

- */

-#define CH_CFG_USE_CONDVARS                 TRUE

-

-/**

- * @brief   Conditional Variables APIs with timeout.

- * @details If enabled then the conditional variables APIs with timeout

- *          specification are included in the kernel.

- *

- * @note    The default is @p TRUE.

- * @note    Requires @p CH_CFG_USE_CONDVARS.

- */

-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE

-

-/**

- * @brief   Events Flags APIs.

- * @details If enabled then the event flags APIs are included in the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_EVENTS                   TRUE

-

-/**

- * @brief   Events Flags APIs with timeout.

- * @details If enabled then the events APIs with timeout specification

- *          are included in the kernel.

- *

- * @note    The default is @p TRUE.

- * @note    Requires @p CH_CFG_USE_EVENTS.

- */

-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE

-

-/**

- * @brief   Synchronous Messages APIs.

- * @details If enabled then the synchronous messages APIs are included

- *          in the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_MESSAGES                 TRUE

-

-/**

- * @brief   Synchronous Messages queuing mode.

- * @details If enabled then messages are served by priority rather than in

- *          FIFO order.

- *

- * @note    The default is @p FALSE. Enable this if you have special

- *          requirements.

- * @note    Requires @p CH_CFG_USE_MESSAGES.

- */

-#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE

-

-/**

- * @brief   Mailboxes APIs.

- * @details If enabled then the asynchronous messages (mailboxes) APIs are

- *          included in the kernel.

- *

- * @note    The default is @p TRUE.

- * @note    Requires @p CH_CFG_USE_SEMAPHORES.

- */

-#define CH_CFG_USE_MAILBOXES                TRUE

-

-/**

- * @brief   Core Memory Manager APIs.

- * @details If enabled then the core memory manager APIs are included

- *          in the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_MEMCORE                  TRUE

-

-/**

- * @brief   Heap Allocator APIs.

- * @details If enabled then the memory heap allocator APIs are included

- *          in the kernel.

- *

- * @note    The default is @p TRUE.

- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or

- *          @p CH_CFG_USE_SEMAPHORES.

- * @note    Mutexes are recommended.

- */

-#define CH_CFG_USE_HEAP                     TRUE

-

-/**

- * @brief   Memory Pools Allocator APIs.

- * @details If enabled then the memory pools allocator APIs are included

- *          in the kernel.

- *

- * @note    The default is @p TRUE.

- */

-#define CH_CFG_USE_MEMPOOLS                 TRUE

-

-/**

- * @brief   Dynamic Threads APIs.

- * @details If enabled then the dynamic threads creation APIs are included

- *          in the kernel.

- *

- * @note    The default is @p TRUE.

- * @note    Requires @p CH_CFG_USE_WAITEXIT.

- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.

- */

-#define CH_CFG_USE_DYNAMIC                  TRUE

-

-/** @} */

-

-/*===========================================================================*/

-/**

- * @name Debug options

- * @{

- */

-/*===========================================================================*/

-

-/**

- * @brief   Debug option, kernel statistics.

- *

- * @note    The default is @p FALSE.

- */

-#define CH_DBG_STATISTICS                   FALSE

-

-/**

- * @brief   Debug option, system state check.

- * @details If enabled the correct call protocol for system APIs is checked

- *          at runtime.

- *

- * @note    The default is @p FALSE.

- */

-#define CH_DBG_SYSTEM_STATE_CHECK           TRUE

-

-/**

- * @brief   Debug option, parameters checks.

- * @details If enabled then the checks on the API functions input

- *          parameters are activated.

- *

- * @note    The default is @p FALSE.

- */

-#define CH_DBG_ENABLE_CHECKS                TRUE

-

-/**

- * @brief   Debug option, consistency checks.

- * @details If enabled then all the assertions in the kernel code are

- *          activated. This includes consistency checks inside the kernel,

- *          runtime anomalies and port-defined checks.

- *

- * @note    The default is @p FALSE.

- */

-#define CH_DBG_ENABLE_ASSERTS               TRUE

-

-/**

- * @brief   Debug option, trace buffer.

- * @details If enabled then the trace buffer is activated.

- *

- * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.

- */

-#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED

-

-/**

- * @brief   Trace buffer entries.

- * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is

- *          different from @p CH_DBG_TRACE_MASK_DISABLED.

- */

-#define CH_DBG_TRACE_BUFFER_SIZE            128

-

-/**

- * @brief   Debug option, stack checks.

- * @details If enabled then a runtime stack check is performed.

- *

- * @note    The default is @p FALSE.

- * @note    The stack check is performed in a architecture/port dependent way.

- *          It may not be implemented or some ports.

- * @note    The default failure mode is to halt the system with the global

- *          @p panic_msg variable set to @p NULL.

- */

-#define CH_DBG_ENABLE_STACK_CHECK           TRUE

-

-/**

- * @brief   Debug option, stacks initialization.

- * @details If enabled then the threads working area is filled with a byte

- *          value when a thread is created. This can be useful for the

- *          runtime measurement of the used stack.

- *

- * @note    The default is @p FALSE.

- */

-#define CH_DBG_FILL_THREADS                 TRUE

-

-/**

- * @brief   Debug option, threads profiling.

- * @details If enabled then a field is added to the @p thread_t structure that

- *          counts the system ticks occurred while executing the thread.

- *

- * @note    The default is @p FALSE.

- * @note    This debug option is not currently compatible with the

- *          tickless mode.

- */

-#define CH_DBG_THREADS_PROFILING            FALSE

-

-/** @} */

-

-/*===========================================================================*/

-/**

- * @name Kernel hooks

- * @{

- */

-/*===========================================================================*/

-

-/**

- * @brief   Threads descriptor structure extension.

- * @details User fields added to the end of the @p thread_t structure.

- */

-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \

-  /* Add threads custom fields here.*/

-

-/**

- * @brief   Threads initialization hook.

- * @details User initialization code added to the @p chThdInit() API.

- *

- * @note    It is invoked from within @p chThdInit() and implicitly from all

- *          the threads creation APIs.

- */

-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \

-  /* Add threads initialization code here.*/                                \

-}

-

-/**

- * @brief   Threads finalization hook.

- * @details User finalization code added to the @p chThdExit() API.

- */

-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \

-  /* Add threads finalization code here.*/                                  \

-}

-

-/**

- * @brief   Context switch hook.

- * @details This hook is invoked just before switching between threads.

- */

-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \

-  /* Context switch code here.*/                                            \

-}

-

-/**

- * @brief   ISR enter hook.

- */

-#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \

-  /* IRQ prologue code here.*/                                              \

-}

-

-/**

- * @brief   ISR exit hook.

- */

-#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \

-  /* IRQ epilogue code here.*/                                              \

-}

-

-/**

- * @brief   Idle thread enter hook.

- * @note    This hook is invoked within a critical zone, no OS functions

- *          should be invoked from here.

- * @note    This macro can be used to activate a power saving mode.

- */

-#define CH_CFG_IDLE_ENTER_HOOK() {                                          \

-  /* Idle-enter code here.*/                                                \

-}

-

-/**

- * @brief   Idle thread leave hook.

- * @note    This hook is invoked within a critical zone, no OS functions

- *          should be invoked from here.

- * @note    This macro can be used to deactivate a power saving mode.

- */

-#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \

-  /* Idle-leave code here.*/                                                \

-}

-

-/**

- * @brief   Idle Loop hook.

- * @details This hook is continuously invoked by the idle thread loop.

- */

-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \

-  /* Idle loop code here.*/                                                 \

-}

-

-/**

- * @brief   System tick event hook.

- * @details This hook is invoked in the system tick handler immediately

- *          after processing the virtual timers queue.

- */

-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \

-  /* System tick event code here.*/                                         \

-}

-

-/**

- * @brief   System halt hook.

- * @details This hook is invoked in case to a system halting error before

- *          the system is halted.

- */

-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \

-  /* System halt code here.*/                                               \

-}

-

-/**

- * @brief   Trace hook.

- * @details This hook is invoked each time a new record is written in the

- *          trace buffer.

- */

-#define CH_CFG_TRACE_HOOK(tep) {                                            \

-  /* Trace code here.*/                                                     \

-}

-

-/** @} */

-

-/*===========================================================================*/

-/* Port-specific settings (override port settings defaulted in chcore.h).    */

-/*===========================================================================*/

-

-#endif  /* CHCONF_H */

-

-/** @} */

+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    templates/chconf.h
+ * @brief   Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ *          contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_RT_CONF_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION                32
+
+/**
+ * @brief   System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ *          setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY                 1000
+
+/**
+ * @brief   Time delta constant for the tick-less mode.
+ * @note    If this value is zero then the system uses the classic
+ *          periodic tick. This value represents the minimum number
+ *          of ticks that is safe to specify in a timeout directive.
+ *          The value one is not valid, timeouts are rounded up to
+ *          this value.
+ */
+#define CH_CFG_ST_TIMEDELTA                 0
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ *          threads before preemption occurs. Setting this value to zero
+ *          disables the preemption for threads with equal priority and the
+ *          round robin becomes cooperative. Note that higher priority
+ *          threads can still preempt, the kernel is always preemptive.
+ * @note    Disabling the round robin preemption makes the kernel more compact
+ *          and generally faster.
+ * @note    The round robin preemption is not supported in tickless mode and
+ *          must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM                 20
+
+/**
+ * @brief   Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ *          then the whole available RAM is used. The core memory is made
+ *          available to the heap allocator and/or can be used directly through
+ *          the simplified core memory allocator.
+ *
+ * @note    In order to let the OS manage the whole RAM the linker script must
+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note    Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE                 0
+
+/**
+ * @brief   Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ *          does not spawn the idle thread. The application @p main()
+ *          function becomes the idle thread and must implement an
+ *          infinite loop.
+ */
+#define CH_CFG_NO_IDLE_THREAD               FALSE
+
+/* Use __WFI in the idle thread for waiting. Does lower the power
+ * consumption. */
+#define CORTEX_ENABLE_WFI_IDLE              TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ *          is used when two possible implementations exist.
+ *
+ * @note    This is not related to the compiler optimization options.
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED               TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ *          the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM                       FALSE
+
+/**
+ * @brief   Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY                 TRUE
+
+/**
+ * @brief   Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ *          the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT                 TRUE
+
+/**
+ * @brief   Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES               TRUE
+
+/**
+ * @brief   Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ *          priority rather than in FIFO order.
+ *
+ * @note    The default is @p FALSE. Enable this if you have special
+ *          requirements.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
+
+/**
+ * @brief   Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES                  TRUE
+
+/**
+ * @brief   Enables recursive behavior on mutexes.
+ * @note    Recursive mutexes are heavier and have an increased
+ *          memory footprint.
+ *
+ * @note    The default is @p FALSE.
+ * @note    Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
+
+/**
+ * @brief   Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS                 TRUE
+
+/**
+ * @brief   Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ *          specification are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
+
+/**
+ * @brief   Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS                   TRUE
+
+/**
+ * @brief   Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ *          are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
+
+/**
+ * @brief   Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES                 TRUE
+
+/**
+ * @brief   Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ *          FIFO order.
+ *
+ * @note    The default is @p FALSE. Enable this if you have special
+ *          requirements.
+ * @note    Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
+
+/**
+ * @brief   Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ *          included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES                TRUE
+
+/**
+ * @brief   Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE                  TRUE
+
+/**
+ * @brief   Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ *          @p CH_CFG_USE_SEMAPHORES.
+ * @note    Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP                     TRUE
+
+/**
+ * @brief   Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS                 TRUE
+
+/**
+ * @brief   Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_WAITEXIT.
+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC                  TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Debug option, kernel statistics.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS                   FALSE
+
+/**
+ * @brief   Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ *          at runtime.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK           TRUE
+
+/**
+ * @brief   Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ *          parameters are activated.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS                TRUE
+
+/**
+ * @brief   Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ *          activated. This includes consistency checks inside the kernel,
+ *          runtime anomalies and port-defined checks.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS               TRUE
+
+/**
+ * @brief   Debug option, trace buffer.
+ * @details If enabled then the trace buffer is activated.
+ *
+ * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED
+
+/**
+ * @brief   Trace buffer entries.
+ * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ *          different from @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_BUFFER_SIZE            128
+
+/**
+ * @brief   Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note    The default is @p FALSE.
+ * @note    The stack check is performed in a architecture/port dependent way.
+ *          It may not be implemented or some ports.
+ * @note    The default failure mode is to halt the system with the global
+ *          @p panic_msg variable set to @p NULL.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK           TRUE
+
+/**
+ * @brief   Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ *          value when a thread is created. This can be useful for the
+ *          runtime measurement of the used stack.
+ *
+ * @note    The default is @p FALSE.
+ */
+#define CH_DBG_FILL_THREADS                 TRUE
+
+/**
+ * @brief   Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ *          counts the system ticks occurred while executing the thread.
+ *
+ * @note    The default is @p FALSE.
+ * @note    This debug option is not currently compatible with the
+ *          tickless mode.
+ */
+#define CH_DBG_THREADS_PROFILING            FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
+  /* Add threads custom fields here.*/
+
+/**
+ * @brief   Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note    It is invoked from within @p chThdInit() and implicitly from all
+ *          the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
+  /* Add threads initialization code here.*/                                \
+}
+
+/**
+ * @brief   Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
+  /* Add threads finalization code here.*/                                  \
+}
+
+/**
+ * @brief   Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
+  /* Context switch code here.*/                                            \
+}
+
+/**
+ * @brief   ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \
+  /* IRQ prologue code here.*/                                              \
+}
+
+/**
+ * @brief   ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \
+  /* IRQ epilogue code here.*/                                              \
+}
+
+/**
+ * @brief   Idle thread enter hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
+  /* Idle-enter code here.*/                                                \
+}
+
+/**
+ * @brief   Idle thread leave hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
+  /* Idle-leave code here.*/                                                \
+}
+
+/**
+ * @brief   Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
+  /* Idle loop code here.*/                                                 \
+}
+
+/**
+ * @brief   System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ *          after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
+  /* System tick event code here.*/                                         \
+}
+
+/**
+ * @brief   System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ *          the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
+  /* System halt code here.*/                                               \
+}
+
+/**
+ * @brief   Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ *          trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) {                                            \
+  /* Trace code here.*/                                                     \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h).    */
+/*===========================================================================*/
+
+#endif  /* CHCONF_H */
+
+/** @} */
diff --git a/keyboards/chibios_test/teensy_lc_onekey/halconf.h b/keyboards/chibios_test/teensy_lc_onekey/halconf.h
index b1d2cd550..0436408b0 100644
--- a/keyboards/chibios_test/teensy_lc_onekey/halconf.h
+++ b/keyboards/chibios_test/teensy_lc_onekey/halconf.h
@@ -1,187 +1,187 @@
-/*

-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-/**

- * @file    templates/halconf.h

- * @brief   HAL configuration header.

- * @details HAL configuration file, this file allows to enable or disable the

- *          various device drivers from your application. You may also use

- *          this file in order to override the device drivers default settings.

- *

- * @addtogroup HAL_CONF

- * @{

- */

-

-#ifndef _HALCONF_H_

-#define _HALCONF_H_

-

-#include "mcuconf.h"

-

-/**

- * @brief   Enables the PAL subsystem.

- */

-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)

-#define HAL_USE_PAL                 TRUE

-#endif

-

-/**

- * @brief   Enables the ADC subsystem.

- */

-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)

-#define HAL_USE_ADC                 FALSE

-#endif

-

-/**

- * @brief   Enables the CAN subsystem.

- */

-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)

-#define HAL_USE_CAN                 FALSE

-#endif

-

-/**

- * @brief   Enables the DAC subsystem.

- */

-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)

-#define HAL_USE_DAC                 FALSE

-#endif

-

-/**

- * @brief   Enables the EXT subsystem.

- */

-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)

-#define HAL_USE_EXT                 FALSE

-#endif

-

-/**

- * @brief   Enables the GPT subsystem.

- */

-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)

-#define HAL_USE_GPT                 FALSE

-#endif

-

-/**

- * @brief   Enables the I2C subsystem.

- */

-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)

-#define HAL_USE_I2C                 FALSE

-#endif

-

-/**

- * @brief   Enables the I2S subsystem.

- */

-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)

-#define HAL_USE_I2S                 FALSE

-#endif

-

-/**

- * @brief   Enables the ICU subsystem.

- */

-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)

-#define HAL_USE_ICU                 FALSE

-#endif

-

-/**

- * @brief   Enables the MAC subsystem.

- */

-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)

-#define HAL_USE_MAC                 FALSE

-#endif

-

-/**

- * @brief   Enables the MMC_SPI subsystem.

- */

-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)

-#define HAL_USE_MMC_SPI             FALSE

-#endif

-

-/**

- * @brief   Enables the PWM subsystem.

- */

-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)

-#define HAL_USE_PWM                 FALSE

-#endif

-

-/**

- * @brief   Enables the RTC subsystem.

- */

-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)

-#define HAL_USE_RTC                 FALSE

-#endif

-

-/**

- * @brief   Enables the SDC subsystem.

- */

-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)

-#define HAL_USE_SDC                 FALSE

-#endif

-

-/**

- * @brief   Enables the SERIAL subsystem.

- */

-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)

-#define HAL_USE_SERIAL              FALSE

-#endif

-

-/**

- * @brief   Enables the SERIAL over USB subsystem.

- */

-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)

-#define HAL_USE_SERIAL_USB          FALSE

-#endif

-

-/**

- * @brief   Enables the SPI subsystem.

- */

-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)

-#define HAL_USE_SPI                 FALSE

-#endif

-

-/**

- * @brief   Enables the UART subsystem.

- */

-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)

-#define HAL_USE_UART                FALSE

-#endif

-

-/**

- * @brief   Enables the USB subsystem.

- */

-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)

-#define HAL_USE_USB                 TRUE

-#endif

-

-/**

- * @brief   Enables the WDG subsystem.

- */

-#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)

-#define HAL_USE_WDG                 FALSE

-#endif

-

-/*===========================================================================*/

-/* USB driver related settings.                                              */

-/*===========================================================================*/

-

-/**

- * @brief   Enables synchronous APIs.

- * @note    Disabling this option saves both code and data space.

- */

-#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)

-#define USB_USE_WAIT                TRUE

-#endif

-

-#endif /* _HALCONF_H_ */

-

-/** @} */

+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+/**
+ * @file    templates/halconf.h
+ * @brief   HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                 TRUE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                 FALSE
+#endif
+
+/**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI             FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                 FALSE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL              FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB          FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                 FALSE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                 TRUE
+#endif
+
+/**
+ * @brief   Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG                 FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/keyboards/chibios_test/teensy_lc_onekey/mcuconf.h b/keyboards/chibios_test/teensy_lc_onekey/mcuconf.h
index c63659019..2764e8898 100644
--- a/keyboards/chibios_test/teensy_lc_onekey/mcuconf.h
+++ b/keyboards/chibios_test/teensy_lc_onekey/mcuconf.h
@@ -1,55 +1,55 @@
-/*

-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio

-

-    Licensed under the Apache License, Version 2.0 (the "License");

-    you may not use this file except in compliance with the License.

-    You may obtain a copy of the License at

-

-        http://www.apache.org/licenses/LICENSE-2.0

-

-    Unless required by applicable law or agreed to in writing, software

-    distributed under the License is distributed on an "AS IS" BASIS,

-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

-    See the License for the specific language governing permissions and

-    limitations under the License.

-*/

-

-#ifndef _MCUCONF_H_

-#define _MCUCONF_H_

-

-#define KL2x_MCUCONF

-

-/*

- * HAL driver system settings.

- */

-#if 1

-/* PEE mode - 48MHz system clock driven by (16 MHz) external crystal. */

-#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_PEE

-#define KINETIS_PLLCLK_FREQUENCY    96000000UL

-#define KINETIS_SYSCLK_FREQUENCY    48000000UL

-#endif

-

-#if 0

-/* crystal-less FEI mode - 48 MHz with internal 32.768 kHz crystal */

-#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_FEI

-#define KINETIS_MCG_FLL_DMX32       1           /* Fine-tune for 32.768 kHz */

-#define KINETIS_MCG_FLL_DRS         1           /* 1464x FLL factor */

-#define KINETIS_SYSCLK_FREQUENCY    47972352UL  /* 32.768 kHz * 1464 (~48 MHz) */

-#define KINETIS_CLKDIV1_OUTDIV1     1           /* do not divide system clock */

-#endif

-

-/*

- * SERIAL driver system settings.

- */

-#define KINETIS_SERIAL_USE_UART0              TRUE

-

-/*

- * USB driver settings

- */

-#define KINETIS_USB_USE_USB0                  TRUE

-/* Need to redefine this, since the default is for K20x */

-/* This is for Teensy LC; you should comment it out (or change to 5)

- * for Teensy 3.x */

-#define KINETIS_USB_USB0_IRQ_PRIORITY         2

-

-#endif /* _MCUCONF_H_ */

+/*
+    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+    Licensed under the Apache License, Version 2.0 (the "License");
+    you may not use this file except in compliance with the License.
+    You may obtain a copy of the License at
+
+        http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+#define KL2x_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#if 1
+/* PEE mode - 48MHz system clock driven by (16 MHz) external crystal. */
+#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_PEE
+#define KINETIS_PLLCLK_FREQUENCY    96000000UL
+#define KINETIS_SYSCLK_FREQUENCY    48000000UL
+#endif
+
+#if 0
+/* crystal-less FEI mode - 48 MHz with internal 32.768 kHz crystal */
+#define KINETIS_MCG_MODE            KINETIS_MCG_MODE_FEI
+#define KINETIS_MCG_FLL_DMX32       1           /* Fine-tune for 32.768 kHz */
+#define KINETIS_MCG_FLL_DRS         1           /* 1464x FLL factor */
+#define KINETIS_SYSCLK_FREQUENCY    47972352UL  /* 32.768 kHz * 1464 (~48 MHz) */
+#define KINETIS_CLKDIV1_OUTDIV1     1           /* do not divide system clock */
+#endif
+
+/*
+ * SERIAL driver system settings.
+ */
+#define KINETIS_SERIAL_USE_UART0              TRUE
+
+/*
+ * USB driver settings
+ */
+#define KINETIS_USB_USE_USB0                  TRUE
+/* Need to redefine this, since the default is for K20x */
+/* This is for Teensy LC; you should comment it out (or change to 5)
+ * for Teensy 3.x */
+#define KINETIS_USB_USB0_IRQ_PRIORITY         2
+
+#endif /* _MCUCONF_H_ */