diff options
Diffstat (limited to 'drivers')
-rwxr-xr-x | drivers/avr/i2c_master.c | 133 | ||||
-rwxr-xr-x | drivers/avr/i2c_master.h | 25 | ||||
-rw-r--r-- | drivers/avr/is31fl3731.c | 87 | ||||
-rw-r--r-- | drivers/avr/is31fl3731.h | 10 |
4 files changed, 147 insertions, 108 deletions
diff --git a/drivers/avr/i2c_master.c b/drivers/avr/i2c_master.c index caca2179e..30ea760c9 100755 --- a/drivers/avr/i2c_master.c +++ b/drivers/avr/i2c_master.c @@ -19,7 +19,7 @@ void i2c_init(void) //TWBR = 10; } -i2c_status_t i2c_start(uint8_t address, uint8_t timeout) +i2c_status_t i2c_start(uint8_t address, uint16_t timeout) { // reset TWI control register TWCR = 0; @@ -28,13 +28,13 @@ i2c_status_t i2c_start(uint8_t address, uint8_t timeout) uint16_t timeout_timer = timer_read(); while( !(TWCR & (1<<TWINT)) ) { - if (timeout && (timer_read() - timeout_timer) > timeout) { + if (timeout && ((timer_read() - timeout_timer) > timeout)) { return I2C_STATUS_TIMEOUT; } } // check if the start condition was successfully transmitted - if(((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)){ return 1; } + if(((TW_STATUS & 0xF8) != TW_START) && ((TW_STATUS & 0xF8) != TW_REP_START)){ return I2C_STATUS_ERROR; } // load slave address into data register TWDR = address; @@ -43,19 +43,19 @@ i2c_status_t i2c_start(uint8_t address, uint8_t timeout) timeout_timer = timer_read(); while( !(TWCR & (1<<TWINT)) ) { - if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) { + if (timeout && ((timer_read() - timeout_timer) > timeout)) { return I2C_STATUS_TIMEOUT; } } // check if the device has acknowledged the READ / WRITE mode uint8_t twst = TW_STATUS & 0xF8; - if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return 1; + if ( (twst != TW_MT_SLA_ACK) && (twst != TW_MR_SLA_ACK) ) return I2C_STATUS_ERROR; - return 0; + return I2C_STATUS_SUCCESS; } -i2c_status_t i2c_write(uint8_t data, uint8_t timeout) +i2c_status_t i2c_write(uint8_t data, uint16_t timeout) { // load data into data register TWDR = data; @@ -64,17 +64,17 @@ i2c_status_t i2c_write(uint8_t data, uint8_t timeout) uint16_t timeout_timer = timer_read(); while( !(TWCR & (1<<TWINT)) ) { - if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) { + if (timeout && ((timer_read() - timeout_timer) > timeout)) { return I2C_STATUS_TIMEOUT; } } - if( (TW_STATUS & 0xF8) != TW_MT_DATA_ACK ){ return 1; } + if( (TW_STATUS & 0xF8) != TW_MT_DATA_ACK ){ return I2C_STATUS_ERROR; } - return 0; + return I2C_STATUS_SUCCESS; } -i2c_status_t i2c_read_ack(uint8_t timeout) +int16_t i2c_read_ack(uint16_t timeout) { // start TWI module and acknowledge data after reception @@ -82,7 +82,7 @@ i2c_status_t i2c_read_ack(uint8_t timeout) uint16_t timeout_timer = timer_read(); while( !(TWCR & (1<<TWINT)) ) { - if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) { + if (timeout && ((timer_read() - timeout_timer) > timeout)) { return I2C_STATUS_TIMEOUT; } } @@ -91,7 +91,7 @@ i2c_status_t i2c_read_ack(uint8_t timeout) return TWDR; } -i2c_status_t i2c_read_nack(uint8_t timeout) +int16_t i2c_read_nack(uint16_t timeout) { // start receiving without acknowledging reception @@ -99,7 +99,7 @@ i2c_status_t i2c_read_nack(uint8_t timeout) uint16_t timeout_timer = timer_read(); while( !(TWCR & (1<<TWINT)) ) { - if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) { + if (timeout && ((timer_read() - timeout_timer) > timeout)) { return I2C_STATUS_TIMEOUT; } } @@ -108,81 +108,112 @@ i2c_status_t i2c_read_nack(uint8_t timeout) return TWDR; } -i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length) +i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) { - if (i2c_start(address | I2C_WRITE)) return 1; + i2c_status_t status = i2c_start(address | I2C_WRITE, timeout); + if (status) return status; - for (uint16_t i = 0; i < length; i++) - { - if (i2c_write(data[i])) return 1; + for (uint16_t i = 0; i < length; i++) { + status = i2c_write(data[i], timeout); + if (status) return status; } - i2c_stop(); + status = i2c_stop(timeout); + if (status) return status; - return 0; + return I2C_STATUS_SUCCESS; } -uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length) +i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) { - if (i2c_start(address | I2C_READ)) return 1; - - for (uint16_t i = 0; i < (length-1); i++) - { - data[i] = i2c_read_ack(); + i2c_status_t status = i2c_start(address | I2C_READ, timeout); + if (status) return status; + + for (uint16_t i = 0; i < (length-1); i++) { + status = i2c_read_ack(timeout); + if (status >= 0) { + data[i] = status; + } else { + return status; + } } - data[(length-1)] = i2c_read_nack(); - i2c_stop(); + status = i2c_read_nack(timeout); + if (status >= 0 ) { + data[(length-1)] = status; + } else { + return status; + } + + status = i2c_stop(timeout); + if (status) return status; - return 0; + return I2C_STATUS_SUCCESS; } -uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length) +i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) { - if (i2c_start(devaddr | 0x00)) return 1; + i2c_status_t status = i2c_start(devaddr | 0x00, timeout); + if (status) return status; - i2c_write(regaddr); + status = i2c_write(regaddr, timeout); + if (status) return status; - for (uint16_t i = 0; i < length; i++) - { - if (i2c_write(data[i])) return 1; + for (uint16_t i = 0; i < length; i++) { + status = i2c_write(data[i], timeout); + if (status) return status; } - i2c_stop(); + status = i2c_stop(timeout); + if (status) return status; - return 0; + return I2C_STATUS_SUCCESS; } -uint8_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length) +i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) { - if (i2c_start(devaddr)) return 1; + i2c_status_t status = i2c_start(devaddr, timeout); + if (status) return status; - i2c_write(regaddr); + status = i2c_write(regaddr, timeout); + if (status) return status; - if (i2c_start(devaddr | 0x01)) return 1; + status = i2c_start(devaddr | 0x01, timeout); + if (status) return status; - for (uint16_t i = 0; i < (length-1); i++) - { - data[i] = i2c_read_ack(); + for (uint16_t i = 0; i < (length-1); i++) { + status = i2c_read_ack(timeout); + if (status >= 0) { + data[i] = status; + } else { + return status; + } } - data[(length-1)] = i2c_read_nack(); - i2c_stop(); + status = i2c_read_nack(timeout); + if (status >= 0 ) { + data[(length-1)] = status; + } else { + return status; + } + + status = i2c_stop(timeout); + if (status) return status; - return 0; + return I2C_STATUS_SUCCESS; } -i2c_status_t i2c_stop(uint8_t timeout) +i2c_status_t i2c_stop(uint16_t timeout) { // transmit STOP condition TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO); uint16_t timeout_timer = timer_read(); while(TWCR & (1<<TWSTO)) { - if (timeout && (timer_read() - timeout_timer) > I2C_TIMEOUT) { + if (timeout && ((timer_read() - timeout_timer) > timeout)) { return I2C_STATUS_TIMEOUT; } } - return 0; + return I2C_STATUS_SUCCESS; } diff --git a/drivers/avr/i2c_master.h b/drivers/avr/i2c_master.h index 3c7731e8d..0806d76aa 100755 --- a/drivers/avr/i2c_master.h +++ b/drivers/avr/i2c_master.h @@ -8,20 +8,21 @@ #define I2C_READ 0x01 #define I2C_WRITE 0x00 -typedef i2c_status_t int16_t -#define I2C_STATUS_TIMEOUT (-1) +typedef int16_t i2c_status_t; -#define I2C_NO_TIMEOUT 0 +#define I2C_STATUS_SUCCESS (0) +#define I2C_STATUS_ERROR (-1) +#define I2C_STATUS_TIMEOUT (-2) void i2c_init(void); -i2c_status_t i2c_start(uint8_t address, uint8_t timeout); -i2c_status_t i2c_write(uint8_t data, uint8_t timeout); -i2c_status_t i2c_read_ack(uint8_t timeout); -i2c_status_t i2c_read_nack(uint8_t timeout); -uint8_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length); -uint8_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length); -uint8_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length); -uint8_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length); -i2c_status_t i2c_stop(uint8_t timeout); +i2c_status_t i2c_start(uint8_t address, uint16_t timeout); +i2c_status_t i2c_write(uint8_t data, uint16_t timeout); +int16_t i2c_read_ack(uint16_t timeout); +int16_t i2c_read_nack(uint16_t timeout); +i2c_status_t i2c_transmit(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout); +i2c_status_t i2c_stop(uint16_t timeout); #endif // I2C_MASTER_H diff --git a/drivers/avr/is31fl3731.c b/drivers/avr/is31fl3731.c index 158b77b7b..70813464b 100644 --- a/drivers/avr/is31fl3731.c +++ b/drivers/avr/is31fl3731.c @@ -49,6 +49,14 @@ #define ISSI_COMMANDREGISTER 0xFD #define ISSI_BANK_FUNCTIONREG 0x0B // helpfully called 'page nine' +#ifndef ISSI_TIMEOUT + #define ISSI_TIMEOUT 100 +#endif + +#ifndef ISSI_PERSISTENCE + #define ISSI_PERSISTENCE 0 +#endif + // Transfer buffer for TWITransmitData() uint8_t g_twi_transfer_buffer[20]; @@ -78,100 +86,104 @@ bool g_led_control_registers_update_required = false; // 0x10 - R16,R15,R14,R13,R12,R11,R10,R09 -uint8_t IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ) +void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ) { g_twi_transfer_buffer[0] = reg; g_twi_transfer_buffer[1] = data; - //Transmit data until succesful - //while(i2c_transmit(addr << 1, g_twi_transfer_buffer,2) != 0); - return i2c_transmit(addr << 1, g_twi_transfer_buffer,2); + #if ISSI_PERSISTENCE > 0 + for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT) == 0) + break; + } + #else + i2c_transmit(addr << 1, g_twi_transfer_buffer, 2, ISSI_TIMEOUT); + #endif } -uint8_t IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ) +void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ) { - uint8_t ret = 0; // assumes bank is already selected // transmit PWM registers in 9 transfers of 16 bytes // g_twi_transfer_buffer[] is 20 bytes // iterate over the pwm_buffer contents at 16 byte intervals - for ( int i = 0; i < 144; i += 16 ) - { + for ( int i = 0; i < 144; i += 16 ) { // set the first register, e.g. 0x24, 0x34, 0x44, etc. g_twi_transfer_buffer[0] = 0x24 + i; // copy the data from i to i+15 // device will auto-increment register for data after the first byte // thus this sets registers 0x24-0x33, 0x34-0x43, etc. in one transfer - for ( int j = 0; j < 16; j++ ) - { + for ( int j = 0; j < 16; j++ ) { g_twi_transfer_buffer[1 + j] = pwm_buffer[i + j]; } - //Transmit buffer until succesful - //while(i2c_transmit(addr << 1, g_twi_transfer_buffer,17) != 0); - ret |= i2c_transmit(addr << 1, g_twi_transfer_buffer, 17); + #if ISSI_PERSISTENCE > 0 + for (uint8_t i = 0; i < ISSI_PERSISTENCE; i++) { + if (i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT) == 0) + break; + } + #else + i2c_transmit(addr << 1, g_twi_transfer_buffer, 17, ISSI_TIMEOUT); + #endif } - return ret; } -uint8_t IS31FL3731_init( uint8_t addr ) +void IS31FL3731_init( uint8_t addr ) { - uint8_t ret = 0; // In order to avoid the LEDs being driven with garbage data // in the LED driver's PWM registers, first enable software shutdown, // then set up the mode and other settings, clear the PWM registers, // then disable software shutdown. // select "function register" bank - ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); + IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); // enable software shutdown - ret |= IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 ); + IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x00 ); // this delay was copied from other drivers, might not be needed _delay_ms( 10 ); // picture mode - ret |= IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE ); + IS31FL3731_write_register( addr, ISSI_REG_CONFIG, ISSI_REG_CONFIG_PICTUREMODE ); // display frame 0 - ret |= IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 ); + IS31FL3731_write_register( addr, ISSI_REG_PICTUREFRAME, 0x00 ); // audio sync off - ret |= IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 ); + IS31FL3731_write_register( addr, ISSI_REG_AUDIOSYNC, 0x00 ); // select bank 0 - ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); + IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); // turn off all LEDs in the LED control register for ( int i = 0x00; i <= 0x11; i++ ) { - ret |= IS31FL3731_write_register( addr, i, 0x00 ); + IS31FL3731_write_register( addr, i, 0x00 ); } // turn off all LEDs in the blink control register (not really needed) for ( int i = 0x12; i <= 0x23; i++ ) { - ret |= IS31FL3731_write_register( addr, i, 0x00 ); + IS31FL3731_write_register( addr, i, 0x00 ); } // set PWM on all LEDs to 0 for ( int i = 0x24; i <= 0xB3; i++ ) { - ret |= IS31FL3731_write_register( addr, i, 0x00 ); + IS31FL3731_write_register( addr, i, 0x00 ); } // select "function register" bank - ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); + IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, ISSI_BANK_FUNCTIONREG ); // disable software shutdown - ret |= IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 ); + IS31FL3731_write_register( addr, ISSI_REG_SHUTDOWN, 0x01 ); // select bank 0 and leave it selected. // most usage after initialization is just writing PWM buffers in bank 0 // as there's not much point in double-buffering - ret |= IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); + IS31FL3731_write_register( addr, ISSI_COMMANDREGISTER, 0 ); - return ret; } void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ) @@ -224,32 +236,27 @@ void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, b g_led_control_registers_update_required = true; - } -uint8_t IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ) +void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ) { - uint8_t ret = 0; if ( g_pwm_buffer_update_required ) { - ret |= IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] ); - ret |= IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] ); + IS31FL3731_write_pwm_buffer( addr1, g_pwm_buffer[0] ); + IS31FL3731_write_pwm_buffer( addr2, g_pwm_buffer[1] ); } g_pwm_buffer_update_required = false; - return ret; } -uint8_t IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 ) +void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 ) { - uint8_t ret = 0; if ( g_led_control_registers_update_required ) { for ( int i=0; i<18; i++ ) { - ret |= IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] ); - ret |= IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] ); + IS31FL3731_write_register(addr1, i, g_led_control_registers[0][i] ); + IS31FL3731_write_register(addr2, i, g_led_control_registers[1][i] ); } } - return ret; } diff --git a/drivers/avr/is31fl3731.h b/drivers/avr/is31fl3731.h index 62632e276..3d30fc67b 100644 --- a/drivers/avr/is31fl3731.h +++ b/drivers/avr/is31fl3731.h @@ -31,9 +31,9 @@ typedef struct is31_led { extern const is31_led g_is31_leds[DRIVER_LED_TOTAL]; -uint8_t IS31FL3731_init( uint8_t addr ); -uint8_t IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ); -uint8_t IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ); +void IS31FL3731_init( uint8_t addr ); +void IS31FL3731_write_register( uint8_t addr, uint8_t reg, uint8_t data ); +void IS31FL3731_write_pwm_buffer( uint8_t addr, uint8_t *pwm_buffer ); void IS31FL3731_set_color( int index, uint8_t red, uint8_t green, uint8_t blue ); void IS31FL3731_set_color_all( uint8_t red, uint8_t green, uint8_t blue ); @@ -44,8 +44,8 @@ void IS31FL3731_set_led_control_register( uint8_t index, bool red, bool green, b // (eg. from a timer interrupt). // Call this while idle (in between matrix scans). // If the buffer is dirty, it will update the driver with the buffer. -uint8_t IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ); -uint8_t IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 ); +void IS31FL3731_update_pwm_buffers( uint8_t addr1, uint8_t addr2 ); +void IS31FL3731_update_led_control_registers( uint8_t addr1, uint8_t addr2 ); #define C1_1 0x24 #define C1_2 0x25 |