summaryrefslogtreecommitdiffstats
AgeCommit message (Collapse)AuthorFilesLines
2017-07-28Delete ALPS+MX RIGHT B.dxfxyxjj1-103482/+0
2017-07-28Delete ALPS RIGHT B.dxfxyxjj1-42762/+0
2017-07-28Delete middle layers - RIGHT B.dxfxyxjj1-90914/+0
2017-07-28Delete bottom layers - RIGHT B.dxfxyxjj1-64240/+0
2017-07-28Delete MX LEFT B.dxfxyxjj1-57152/+0
2017-07-28Delete ALPS+MX LEFT B.dxfxyxjj1-62190/+0
2017-07-28Delete ALPS LEFT B.dxfxyxjj1-28500/+0
2017-07-28Delete Middle layers - LEFT B.dxfxyxjj1-28416/+0
2017-07-28Delete Bottom Layer - LEFT B.dxfxyxjj1-18100/+0
2017-07-28Delete top bezel - blocked corner.dxfxyxjj1-62056/+0
2017-07-28Delete top bezel - Winkeyless.dxfxyxjj1-62084/+0
2017-07-28Delete top bezel - Standard.dxfxyxjj1-66532/+0
2017-07-28Delete PCB Dimesnsion.dxfxyxjj1-63110/+0
2017-07-28Delete MX RIGHT B.dwgxyxjj1-0/+0
2017-07-28Delete ALPS+MX RIGHT B.dwgxyxjj1-0/+0
2017-07-28Delete ALPS RIGHT B.dwgxyxjj1-0/+0
2017-07-28Delete middle layers - RIGHT B.dwgxyxjj1-0/+0
2017-07-28Delete bottom layers - RIGHT B.dwgxyxjj1-0/+0
2017-07-28Delete readme.mdxyxjj1-12/+0
2017-07-28Delete PCB Dimesnsion.dwgxyxjj1-0/+0
2017-07-28Delete MX LEFT B.dwgxyxjj1-0/+0
2017-07-28Delete ALPS+MX LEFT B.dwgxyxjj1-0/+0
2017-07-28Delete ALPS LEFT B.dwgxyxjj1-0/+0
2017-07-28Delete Middle layers - LEFT B.dwgxyxjj1-0/+0
2017-07-28Delete Bottom Layer - LEFT B.dwgxyxjj1-0/+0
2017-07-28Update readme.mdxyxjj1-0/+3
2017-07-28Delete top bezel - blocked corner.dwgxyxjj1-0/+0
2017-07-28Delete top bezel - Winkeyless.dwgxyxjj1-0/+0
2017-07-28Delete top bezel - Standard.dwgxyxjj1-0/+0
2017-07-28Add files via uploadxyxjj1-368/+398
2017-07-28Add files via uploadxyxjj1-0/+0
2017-07-28Add files via uploadxyxjj3-0/+63
2017-07-28Updatexyxjj1-1/+1
2017-07-28Update readme.mdxyxjj1-3/+3
2017-07-28Update Makefilexyxjj1-1/+1
2017-07-28Update readme.mdxyxjj1-0/+5
2017-07-28Update readme.mdxyxjj1-1/+7
2017-07-28Delete top bezel - blocked corner.bakxyxjj1-0/+0
2017-07-28Delete top bezel - Standard.bakxyxjj1-0/+0
2017-07-28Delete PCB Dimesnsion.dwl2xyxjj1-7/+0
2017-07-28Delete PCB Dimesnsion.dwlxyxjj1-3/+0
2017-07-28Add files via uploadxyxjj30-0/+795920
2017-07-28Delete PCB Dimesnsion.dwgxyxjj1-0/+0
2017-07-28Create readme.mdxyxjj1-0/+1
2017-07-28Add files via uploadxyxjj13-0/+0
2017-07-28Update readme.mdxyxjj1-1/+1
2017-07-28Update readme.mdxyxjj1-2/+0
2017-07-28Update readme.mdxyxjj1-0/+6
2017-07-28Add files via uploadxyxjj28-0/+1883
2017-07-27Fix typo in docs.Joe Wasson1-1/+1
generated by cgit v1.2.3-24-g4f1b (git 2.32.0) at 2024-11-27 05:21:15 +0100