From 43579a80a7bba63ddf2b3eceb4d05a51727a7cbb Mon Sep 17 00:00:00 2001
From: Art Ortenburger <art4@ortenburger.ca>
Date: Sun, 25 Jun 2017 22:30:07 -0300
Subject: add support for Orthodox keyboard (#1436)

* Added orthodox

* Modified readme

* Modified readme

* Modified readme

* Updated makefile

* Fixed keymap issues

* Modified serial communications to allow for over 8 columns

* Fixed sizeof command

* Fixed some typing issues

* Testing issue #1191 (n-column split i2c slave)

Based on initial OrthoDox (serial) config by @reddragond and others,
this attempts to add TWI (I2C) support.
Relevant: <https://github.com/qmk/qmk_firmware/issues/1191>

- per @ahtn recommendation, using memcpy for moving slave matrix
  into slave sending buffer
- slave buffer has been enlarged using sizeof(matrix_row_t)
- note: i2c.h now includes matrix.h
- note: matrix.c includes <string.h>

* Added i2c keymap - right col still not working

* orthodox: re-added i2c keymap, based on serial

* orthodox / issue #1191: trying 9-bit serial

- orthodox serial protocol now sends 9 bits per row, instead of 16.
  Technically it's using MATRIX_COLS, so it might work generically.
- ROW_MASK is #defined in serial.c to truncate the checksums to prevent
  overflows causing false errors. This macro should be renamed if it's
  kept.

* Revert "Fixed sizeof command"

This reverts commit f62a5b9939d6a9c0e442ec403de00c14431a55f9.

Changes had been made to the lets_split serial driver for testing which
mirrored the multi-byte-row changes made to support the orthodox. As the
lets_split does not require these changes, and new improvements had
been added to the orthodox port only, this commit reverts them.

Because the new code could potentially reduce latency over the serial
transport, it may be desirable to re-add in the future, by backporting
the current working orthodox code.

* orthodox: default serial keymap improvements

- formatting has been improved
- a few keys have been shifted, mainly in Raise and Lower layers,
  to be more like the default Planck layout
- Now available: F12, Home, End, PgUp, PgDn, Media-Next, Media-Play

Still To Do:
- duplicate for TWI
- Alt modifier
- GUI modifier

* orthodox: failed attempt at 16b/row TWI

- duplicated updated serial keymap for "i2c"
- removed string.h/memcpy, instead
- hardcoded copying of six bytes per update
- still doesn't work; master reports interconnect errors on txled

* orthodox: adjusted default keymap

- this is applied to both 'serial' and 'i2c' keymaps
- Alt and GUI have been added, as they were missing
- comma and period persist across more layers; Home/PgUp and End/PgDn
  have been moved slightly to accommodate

* orthodox: revert TWI support to minimum to debug

- disabled ssd1306 and hardware locking in build configuration
- increased TWI buffer from 0x10 to 0x20 bytes
- decreased TWI clock from 400000 to 100000
- removed hardcoded TWI multi-byte sending/receiving

An 'i2c' build of this was found to work on a rev1 Orthodox, although
slave-side col9 was understandably not working. When testing-time
permits, features will be gradually re-enabled towards getting the full
matrix supported over TWI.

* orthodox: TWI (i2c) is working, kludge for col9

The TWI interconnect ("i2c" in directories and build config) is now
working for the Orthodox, including the slave half's column #9.
This is intended as an interim solution, as it's a kludge, not a fix.

Rather than a working multi-byte implementation, the two col9 keys'
bits are packed-into and unpacked-from the two unused bits in row1.
Furthermore, the TWI clock constant has been reduced to 100000 from
400000, as testing revealed the higher value just didn't work.
Testing also found that (with this kludge) increasing the TWI buffer
was not necessary.

This commit leaves many commented-out lines in matrix.c from previous
testing, which will be removed in a future commit once the
interconnects' multi-byte problems have been debugged more thoroughly.

* orthodox: updated readme.md

The readme for the Orthodox now includes a description of the keyboard,
allusions to its author and availability, a linked photo, and links to
the evolving build guide and the current keymap on KLE.
This update has been prepared with /u/Deductivemonkee's assistance.
---
 keyboards/orthodox/i2c.c | 162 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 162 insertions(+)
 create mode 100644 keyboards/orthodox/i2c.c

(limited to 'keyboards/orthodox/i2c.c')

diff --git a/keyboards/orthodox/i2c.c b/keyboards/orthodox/i2c.c
new file mode 100644
index 000000000..084c890c4
--- /dev/null
+++ b/keyboards/orthodox/i2c.c
@@ -0,0 +1,162 @@
+#include <util/twi.h>
+#include <avr/io.h>
+#include <stdlib.h>
+#include <avr/interrupt.h>
+#include <util/twi.h>
+#include <stdbool.h>
+#include "i2c.h"
+
+#ifdef USE_I2C
+
+// Limits the amount of we wait for any one i2c transaction.
+// Since were running SCL line 100kHz (=> 10μs/bit), and each transactions is
+// 9 bits, a single transaction will take around 90μs to complete.
+//
+// (F_CPU/SCL_CLOCK)  =>  # of μC cycles to transfer a bit
+// poll loop takes at least 8 clock cycles to execute
+#define I2C_LOOP_TIMEOUT (9+1)*(F_CPU/SCL_CLOCK)/8
+
+#define BUFFER_POS_INC() (slave_buffer_pos = (slave_buffer_pos+1)%SLAVE_BUFFER_SIZE)
+
+volatile uint8_t i2c_slave_buffer[SLAVE_BUFFER_SIZE];
+
+static volatile uint8_t slave_buffer_pos;
+static volatile bool slave_has_register_set = false;
+
+// Wait for an i2c operation to finish
+inline static
+void i2c_delay(void) {
+  uint16_t lim = 0;
+  while(!(TWCR & (1<<TWINT)) && lim < I2C_LOOP_TIMEOUT)
+    lim++;
+
+  // easier way, but will wait slightly longer
+  // _delay_us(100);
+}
+
+// Setup twi to run at 100kHz
+void i2c_master_init(void) {
+  // no prescaler
+  TWSR = 0;
+  // Set TWI clock frequency to SCL_CLOCK. Need TWBR>10.
+  // Check datasheets for more info.
+  TWBR = ((F_CPU/SCL_CLOCK)-16)/2;
+}
+
+// Start a transaction with the given i2c slave address. The direction of the
+// transfer is set with I2C_READ and I2C_WRITE.
+// returns: 0 => success
+//          1 => error
+uint8_t i2c_master_start(uint8_t address) {
+  TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTA);
+
+  i2c_delay();
+
+  // check that we started successfully
+  if ( (TW_STATUS != TW_START) && (TW_STATUS != TW_REP_START))
+    return 1;
+
+  TWDR = address;
+  TWCR = (1<<TWINT) | (1<<TWEN);
+
+  i2c_delay();
+
+  if ( (TW_STATUS != TW_MT_SLA_ACK) && (TW_STATUS != TW_MR_SLA_ACK) )
+    return 1; // slave did not acknowledge
+  else
+    return 0; // success
+}
+
+
+// Finish the i2c transaction.
+void i2c_master_stop(void) {
+  TWCR = (1<<TWINT) | (1<<TWEN) | (1<<TWSTO);
+
+  uint16_t lim = 0;
+  while(!(TWCR & (1<<TWSTO)) && lim < I2C_LOOP_TIMEOUT)
+    lim++;
+}
+
+// Write one byte to the i2c slave.
+// returns 0 => slave ACK
+//         1 => slave NACK
+uint8_t i2c_master_write(uint8_t data) {
+  TWDR = data;
+  TWCR = (1<<TWINT) | (1<<TWEN);
+
+  i2c_delay();
+
+  // check if the slave acknowledged us
+  return (TW_STATUS == TW_MT_DATA_ACK) ? 0 : 1;
+}
+
+// Read one byte from the i2c slave. If ack=1 the slave is acknowledged,
+// if ack=0 the acknowledge bit is not set.
+// returns: byte read from i2c device
+uint8_t i2c_master_read(int ack) {
+  TWCR = (1<<TWINT) | (1<<TWEN) | (ack<<TWEA);
+
+  i2c_delay();
+  return TWDR;
+}
+
+void i2c_reset_state(void) {
+  TWCR = 0;
+}
+
+void i2c_slave_init(uint8_t address) {
+  TWAR = address << 0; // slave i2c address
+  // TWEN  - twi enable
+  // TWEA  - enable address acknowledgement
+  // TWINT - twi interrupt flag
+  // TWIE  - enable the twi interrupt
+  TWCR = (1<<TWIE) | (1<<TWEA) | (1<<TWINT) | (1<<TWEN);
+}
+
+ISR(TWI_vect);
+
+ISR(TWI_vect) {
+  uint8_t ack = 1;
+  switch(TW_STATUS) {
+    case TW_SR_SLA_ACK:
+      // this device has been addressed as a slave receiver
+      slave_has_register_set = false;
+      break;
+
+    case TW_SR_DATA_ACK:
+      // this device has received data as a slave receiver
+      // The first byte that we receive in this transaction sets the location
+      // of the read/write location of the slaves memory that it exposes over
+      // i2c.  After that, bytes will be written at slave_buffer_pos, incrementing
+      // slave_buffer_pos after each write.
+      if(!slave_has_register_set) {
+        slave_buffer_pos = TWDR;
+        // don't acknowledge the master if this memory loctaion is out of bounds
+        if ( slave_buffer_pos >= SLAVE_BUFFER_SIZE ) {
+          ack = 0;
+          slave_buffer_pos = 0;
+        }
+        slave_has_register_set = true;
+      } else {
+        i2c_slave_buffer[slave_buffer_pos] = TWDR;
+        BUFFER_POS_INC();
+      }
+      break;
+
+    case TW_ST_SLA_ACK:
+    case TW_ST_DATA_ACK:
+      // master has addressed this device as a slave transmitter and is
+      // requesting data.
+      TWDR = i2c_slave_buffer[slave_buffer_pos];
+      BUFFER_POS_INC();
+      break;
+
+    case TW_BUS_ERROR: // something went wrong, reset twi state
+      TWCR = 0;
+    default:
+      break;
+  }
+  // Reset everything, so we are ready for the next TWI interrupt
+  TWCR |= (1<<TWIE) | (1<<TWINT) | (ack<<TWEA) | (1<<TWEN);
+}
+#endif
-- 
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